![]() ![]() In particular, memory stores are always carried out in program order – this holds true for both uniprocessor and multiprocessor systems. IA-32 and Intel 64 implement a rather strong memory model. However, the memory model and the memory order enforced by the various CPUs addressed in this chapter differs significantly. Although both read and store operations are subject to potential reordering, only reordering of store operations is of interest in the context of the example depicted above. Respecting the memory model implemented by the processor is thus crucial in order to achieve safe operation. To avoid such situations from occuring, the program must explicitly prohibit certain reorderings to be performed, which can be done by using memory fences. Such reordering may, in certain situations like the one depicted before, lead to wrong results or to windows of inconsistency. In order to speed up execution, these processors allow certain memory operations to be conducted out of order. Contemporary processors, however, implement significantly weaker memory models. ![]() On processors such as the Intel 386, this order is preserved. The order in which a program specifies memory loads and stores to be conducted is referred to as program order. If multiple CPUs were involved and code became subject to execution while in such an inconsistent state, undefined execution behaviour would occur. Otherwise, if the branch was written before the trampoline code has been stored, the branch would temporarily point to uninitialized memory. In such cases, it is essential for maintaining consistency that the code changes take effect in a specific order. As an example, a trampoline may need to be generated or updated, followed by a modification on the original routine, which may include updatating or replacing a branch instruction to point to the trampoline. Instrumentation of a routine may comprise multiple steps. ![]() Runtime Code Modification Explained, Part 2: Cache Coherency Issues Posted on 2015.01.19 ![]()
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